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high-level-synthesis
Press Release
Jan 18, 2021
Silexica Announces New Distribution Partnership With Jingwei HiRain Technologies
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Press Release
Jan 11, 2021
Silexica's New SLX FPGA 2020.4 Ushers in a New Level of Usability
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Press Release
Dec 9, 2020
Silexica Launches First Commercially Available High-Level Synthesis (HLS) Plugin
The SLX Plugin extends Vitis HLS capabilities as part of Xilinx's open source initiative
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Press Release
Oct 13, 2020
Silexica Extends Collaboration With Mentor for High-Level Synthesis
Presenting HLS Ecosystem Solutions for ASIC and FPGA for IoT Applications
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Press Release
Jun 30, 2020
SLX FPGA 2020.2 Delivers Significant Usability Improvements
New project importer and faster analysis times enable faster time-to-market
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Press Release
Jun 1, 2020
Silexica Expands Into FinTech Industry Bringing Next-Generation Compute Acceleration
Empowering Financial Services with SLX FPGA for Improved Performance and Time-to-Market
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Press Release
May 6, 2020
Silexica Presents With Mentor for a High-Level Synthesis Seminar Series
Presenting HLS Ecosystem Solutions for ASIC and FPGA for IoT Applications
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Press Release
Apr 20, 2020
SLX FPGA 2020.1 Extends C++ Support and Advanced Array Partitioning
Performance enhancements further enable Aerospace and FinTech Industries
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Press Release
Dec 16, 2019
SLX FPGA v2019.4 Delivers an Average of 45x HLS Performance Improvement
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Press Release
Oct 1, 2019
Silexica Demonstrates SLX FPGA Tool With New Xilinx Vitis Unified Software Platform
See the SLX FPGA demos with Vitis and Vidado HLS at Xilinx Developers Forum (XDF) 2019
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Press Release
Sep 16, 2019
Silexica Joins Xilinx Developer Forum 2019 as a Diamond Sponsor
Silexica will demonstrate SLX FPGA working together with Xilinx Vivado High-Level Synthesis
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